1. Field of the Invention
This invention relates to data processing systems. More particularly, this invention relates to the provision of distributed direct memory access management capabilities within a data processing system.
2. Description of the Prior Art
It is known to provide data processing systems with a direct memory access controller which is able to autonomously manage data transfers. As an example, in a system-on-chip design including a CPU and a DMA controller, the DMA controller may perform regular high volume data transfers, such as screen refresh, whilst the CPU is left to control other data transfers. This reduces the processing burden upon the CPU.
It is also known to provide more than one DMA controller within a system. These may, for example, be provided on respective buses to provide separate DMA capabilities on those buses.
A problem associated with traditional DMA controllers is that they introduce a signal transfer bottleneck since they service the DMA requirements of several devices which must all be routed through the DMA controller. Where more than one DMA controller is provided, there is the additional complication of distributing control information between those DMA controllers such that they act in a coordinated fashion. A further disadvantage with the traditional approach is that the DMA controllers will tend to have a fixed priority level associated with the data transfers that they instruct and will utilise a single memory map. This provides a disadvantageously coarse level of control.